This invention generally relates to optoelectronic integrated circuits, or photonics chips, and more specifically, to optical coupling between a waveguide and a photonics chip.
Optoelectronic integrated circuits (ICs) include both electronic and optical elements within a single chip. Typical electronic elements include field effect transistors, capacitors, and resistors; and typical optical elements include waveguides, optical filters, modulators, and photodetectors. Within a given optoelectronic IC, some of the electronic elements may be dedicated to handling tasks such as data storage and signal processing. Other electronic elements may be dedicated to controlling or modulating the optical elements. Including both types of elements on a single chip provides several advantages, which include reduced layout area, cost, and operational overhead. In addition, such integration yields hybrid devices, such as an opto-isolator.
The integration of optical and electronic elements has been greatly facilitated by the maturation of today's semiconductor processing techniques. For instance, conventional processing techniques may be adapted to create silicon-based prisms, waveguides, and other optical devices.
One device, however, that has been difficult to integrate is a silicon based laser or light source. As a result, most optoelectronic ICs are adapted to receive an externally applied light beam from a laser or an optical fiber. Unfortunately, introducing a light beam to an IC can often be difficult. For example, in order for an optoelectronic IC to accommodate a light beam, the spot size and the numerical aperture (NA) of the beam may need to be appropriately matched to optical elements within an IC.
Two primary methods for coupling standard single-mode optical fibers to/from high-index contrast photonic platforms are (1) edge coupling based on inverse tapered waveguides, and (2) near-normal coupling based on resonant waveguide gratings. With the former approach, the inverse tapered waveguides (e.g., Si) are evanescently coupled to lower index contrast waveguides (e.g., SiON) with mode-field diameters larger than the high-index-contrast waveguides but still much smaller than those of standard single-mode optical fiber.
This edge coupling approach may suffer from limited real estate available at the chip edge for optical I/O, limited I/O density limited to 1-D fiber arrays, and additional complexity (such as fiber tapers, lenses, etc.) required for interfacing the unmatched mode field diameters at the chip edge and fiber facet. The second approach alleviates many of these problems. First, it allows coupling of 2-D fiber arrays to 2-D layouts of waveguide gratings on the chip surface. Second, it can provide fiber-matched mode-field diameters in well-designed gratings. However, the intrinsic trade-off in the grating couplers between coupling efficiency and bandwidth, as well as a fundamental coupling efficiency limit of less than unity, plagues systems seeking to implement this technology. Additionally, the standard approach of coupling from the top of the photonic device layer is not compatible with CMOS-processing, which includes several layers of metals and dielectrics above the photonic device layer.
In one prior art system, a metal mirror may be introduced above a grating to retransmit the uncoupled light back into the grating a second time for increased efficiency. In this implementation, the optical beam passes through the chip substrate, but the optical properties of the substrate are not leveraged for increased coupling performance. Instead, a complex lensing system is used near a remote fiber facet. Another prior art system implements prisms within and around the substrate to couple light into and out of the photonic waveguides from the bottom side of the chip. However, evanescent coupling schemes, rather than grating-based coupling schemes, are used, which require a costly thinning of the buried oxide layer to less than 250 nm (typically 1 to 3 um).